Memory devices are typically provided as internal storage areas in computers. The term memory identifies data storage that comes in the form of integrated circuit chips. In general, memory devices contain an array of memory cells for storing data, and row and column decoder circuits coupled to the array of memory cells for accessing the array of memory cells in response to an external address.
One type of memory is a non-volatile memory known as flash memory. A flash memory is a type of EEPROM (electrically-erasable programmable read-only memory) that can be erased and reprogrammed in blocks. Many modern personal computers (PCs) have their BIOS stored on a flash memory chip so that it can easily be updated if necessary. Such a BIOS is sometimes called a flash BIOS. Flash memory is also popular in wireless electronic devices because it enables the manufacturer to support new communication protocols as they become standardized and to provide the ability to remotely upgrade the device for enhanced features.
A typical flash memory comprises a memory array that includes a large number of memory cells arranged in row and column fashion. Each of the memory cells includes a floating-gate field-effect transistor capable of holding a charge. The cells are usually grouped into blocks. Each of the cells within a block can be electrically programmed on an individual basis by charging the floating gate. The charge can be removed from the floating gate by a block erase operation. The data in a cell is determined by the presence or absence of the charge on the floating gate.
A NAND flash memory device is a common type of flash memory device, so called for the logical form the basic memory cell configuration. The control gate of each memory cell of a row of the array is connected to a word-select line. The memory cells of the array are arranged together in strings (often termed NAND strings), typically of 32 each, with the memory cells coupled together in series, source to drain, between a source line and a column bit line. The memory array for NAND flash memory devices is then accessed by a row decoder activating a row of memory cells by selecting the word-select line coupled to a control gate of a memory cell. In addition, the word-select lines coupled to the control gates of unselected memory cells of each string are driven to operate the unselected memory cells of each string as pass transistors, so that they pass current in a manner that is unrestricted by their stored data values. Current then flows from the source line to the column bit line through each series coupled string, restricted only by the selected memory cells of each string. This places the current-encoded data values of the row of selected memory cells on the column bit lines.
Sometimes a portion of the memory cells coupled to a selected word line is targeted for programming. This involves applying a programming voltage to the word line and thus to the control gate of each memory cell coupled to the selected word line, regardless of whether a memory cell is targeted or untargeted for programming. While the programming voltage is applied to the selected word line, a potential, such as a ground potential, is applied to the substrate on which the memory cells are formed and thus to the channels of these memory cells. This produces voltage differences that can disturb the threshold voltages Vt of the untargeted memory cells coupled to the selected word line and partially program these memory cells. This is commonly referred to as a programming-voltage disturbance (or stress). Successive programming operations may have a cumulative effect in that each programming operation partially programs the untargeted cells until the untargeted cells become programmed undesirably.
Moreover, a voltage that is not sufficient for programming the memory cells, typically referred to as a pass voltage, is applied to the remaining (or unselected) word lines to turn on the memory cells coupled to these word lines so that these memory cells can operate as pass transistors. The voltage difference between the pass voltage applied to the unselected word lines and the channels of the memory cells coupled to the unselected word lines can disturb the threshold voltages of these memory cells and partially program them. This is commonly referred to a pass-voltage disturbance (or stress). Successive applications of the pass voltage may have a cumulative effect in that each application partially programs the cells until they become programmed undesirably.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternative memory array structures and programming operations.